The semiconductor industry is constantly striving to achieve higher density electronic devices. As the industry has moved into micron, submicron and even sub-half-micron sized features to achieve higher densities, the need for improved lithography methods to create such minute features has increased.
Among the problems associated with conventional lithography techniques are the lack of uniformity of exposure of resist through a thick layer of resist and scattered light within the layer of resist due to reflective metallized surfaces under the resist. These problems tend to compound the loss of resolution problem by creating ill-defined patterns at the onset.
Standard methods for image development, in the exposed etch resist, fall short of the requirements for sub-half-micron feature generation. Wet development of the etch resist often produces a positive-grade slope on the feature sidewall that degrades the contrast of image transfer into the underlying thin film during the dry etch process. This is due to the less than infinite etch rate selectivity between the resist and the film material. Thus, there is a need for a method for forming high resolution submicron and sub-half-micron sized features on a semiconductor device.